gusucode.com > target工具箱matlab源码程序 > target/extensions/processor/intelhost/tfl/rtwTargetInfo.m
function rtwTargetInfo(cm) %RTWTARGETINFO Target info callback % Copyright 2010-2015 The MathWorks, Inc. cm.registerTargetInfo(@loc_IPP_register_tfl); end % ------------------------------------------------------------------------- function [this, mode] = loc_IPP_register_tfl mode = 'nocheck'; arch = computer('arch'); tablename = ''; iswin64 = false; switch arch case 'win32' tablename = 'intel_ipp_tfl_table_win_32.mat'; case 'win64' tablename = 'intel_ipp_tfl_table_win_64.mat'; iswin64 = true; case 'glnxa64' tablename = 'intel_ipp_tfl_table_glnxa_64.mat'; end switch (arch) case {'win32', 'win64', 'glnxa64'} idx = 0; mingwId = 'GNU-4.x'; % getMexCompilerInfo.CompStr %% legacy idx = idx+1; this(idx) = RTW.TflRegistry('RTW'); this(idx).Name = 'Intel IPP'; this(idx).TableList = {tablename}; this(idx).TargetHWDeviceType = {'Intel Pentium', 'AMD->K5/K6/Athlon', 'Intel->x86-64', 'AMD->Athlon 64', ... 'Intel->x86-64 (Windows64)', 'Intel->x86-64 (Linux 64)', ... 'AMD->x86-64 (Windows64)', 'AMD->x86-64 (Linux 64)'}; this(idx).Description = 'Use Intel IPP library for optimized code generation'; this(idx).LanguageConstraint = {'C99 (ISO)', 'C89/C90 (ANSI)'}; this(idx).IsVisible = false; idx = idx+1; this(idx) = RTW.TflRegistry('RTW'); this(idx).Name = 'Intel IPP/SSE with GNU99 extensions'; this(idx).Alias = {'Intel IPP (GNU)', 'Intel IPP/SSE (GNU)'}; this(idx).TableList = {'intel_sse_tfl_table.mat', tablename}; this(idx).BaseTfl = 'GNU'; this(idx).TargetHWDeviceType = {'Intel Pentium', 'AMD->K5/K6/Athlon', 'Intel->x86-64', 'AMD->Athlon 64', ... 'Intel->x86-64 (Windows64)', 'Intel->x86-64 (Linux 64)', ... 'AMD->x86-64 (Windows64)', 'AMD->x86-64 (Linux 64)'}; this(idx).Description = 'Use Intel IPP library and SSE instructions for optimized code generation'; tc = RTW.TargetCharacteristics; tc.DataAlignment = data_align_specification('gcc'); this(idx).TargetCharacteristics = tc; this(idx).IsVisible = false; %% win64 idx = idx+1; this(idx) = RTW.TflRegistry('RTW'); this(idx).Name = 'Intel IPP for x86-64 (Windows)'; this(idx).TableList = {'intel_ipp_tfl_table_win_64.mat'}; this(idx).TargetHWDeviceType = {'Intel->x86-64', 'AMD->Athlon 64', ... 'Intel->x86-64 (Windows64)', 'AMD->x86-64 (Windows64)'}; this(idx).Description = 'Use Intel IPP library for optimized code generation'; this(idx).LanguageConstraint = {'C99 (ISO)', 'C89/C90 (ANSI)'}; idx = idx+1; this(idx) = RTW.TflRegistry('RTW'); this(idx).Name = 'Intel IPP/SSE with GNU99 extensions for x86-64 (Windows)'; this(idx).TableList = {'intel_sse_tfl_table.mat', 'intel_ipp_tfl_table_win_64.mat'}; this(idx).BaseTfl = 'GNU'; this(idx).TargetHWDeviceType = {'Intel->x86-64', 'AMD->Athlon 64', ... 'Intel->x86-64 (Windows64)', 'AMD->x86-64 (Windows64)'}; this(idx).Description = 'Use Intel IPP library and SSE instructions for optimized code generation'; tc = RTW.TargetCharacteristics; tc.DataAlignment = data_align_specification('msvc'); this(idx).TargetCharacteristics = tc; this(idx).IsVisible = false; idx = idx+1; this(idx) = RTW.TflRegistry('RTW'); this(idx).Name = 'Intel IPP/SSE for x86-64 (Windows)'; this(idx).TableList = {'intel_sse_tfl_table.mat', 'intel_ipp_tfl_table_win_64.mat'}; this(idx).TargetHWDeviceType = {'Intel->x86-64', 'AMD->Athlon 64', ... 'Intel->x86-64 (Windows64)', 'AMD->x86-64 (Windows64)'}; this(idx).Description = 'Use Intel IPP library and SSE instructions for optimized code generation'; tc = RTW.TargetCharacteristics; tc.DataAlignment = data_align_specification('msvc'); this(idx).TargetCharacteristics = tc; %% All libraries before this point are not compatible with mingw % Set Toolchain exclusions for non-mingw compatible libraries if iswin64 % mingw is only supported on win64 so if this is NOT win64, % user is doing cross-platform development so do not check % toolhchain. for i_lib = 1:numel(this) this(i_lib).TargetToolchain = {['-',mingwId]}; end end %% For MinGW idx = idx+1; this(idx) = RTW.TflRegistry('RTW'); this(idx).Name = 'Intel IPP for x86-64 (Windows using MinGW compiler)'; this(idx).TableList = {'intel_ipp_tfl_table_win_64_mingw.mat'}; this(idx).TargetHWDeviceType = {'Intel->x86-64', 'AMD->Athlon 64', ... 'Intel->x86-64 (Windows64)', 'AMD->x86-64 (Windows64)'}; if iswin64 % mingw is only supported on win64 so if this is NOT win64, % user is doing cross-platform development so do not check % toolhchain. this(idx).TargetToolchain = {mingwId}; end this(idx).Description = 'Use Intel IPP library for optimized code generation'; this(idx).LanguageConstraint = {'C99 (ISO)', 'C89/C90 (ANSI)'}; idx = idx+1; this(idx) = RTW.TflRegistry('RTW'); this(idx).Name = 'Intel IPP/SSE for x86-64 (Windows using MinGW compiler)'; this(idx).TableList = {'intel_sse_tfl_table.mat', 'intel_ipp_tfl_table_win_64_mingw.mat'}; this(idx).TargetHWDeviceType = {'Intel->x86-64', 'AMD->Athlon 64', ... 'Intel->x86-64 (Windows64)', 'AMD->x86-64 (Windows64)'}; if iswin64 % mingw is only supported on win64 so if this is NOT win64, % user is doing cross-platform development so do not check % toolhchain. this(idx).TargetToolchain = {mingwId}; end this(idx).Description = 'Use Intel IPP library and SSE instructions for optimized code generation'; tc = RTW.TargetCharacteristics; tc.DataAlignment = data_align_specification('mingw'); this(idx).TargetCharacteristics = tc; %% win32 idx = idx+1; this(idx) = RTW.TflRegistry('RTW'); this(idx).Name = 'Intel IPP for x86/Pentium (Windows)'; this(idx).TableList = {'intel_ipp_tfl_table_win_32.mat'}; this(idx).TargetHWDeviceType = {'Intel Pentium', 'AMD->K5/K6/Athlon'}; this(idx).Description = 'Use Intel IPP library for optimized code generation'; this(idx).LanguageConstraint = {'C99 (ISO)', 'C89/C90 (ANSI)'}; idx = idx+1; this(idx) = RTW.TflRegistry('RTW'); this(idx).Name = 'Intel IPP/SSE with GNU99 extensions for x86/Pentium (Windows)'; this(idx).TableList = {'intel_sse_tfl_table.mat', 'intel_ipp_tfl_table_win_32.mat'}; this(idx).BaseTfl = 'GNU'; this(idx).TargetHWDeviceType = {'Intel Pentium', 'AMD->K5/K6/Athlon'}; this(idx).Description = 'Use Intel IPP library and SSE instructions for optimized code generation'; tc = RTW.TargetCharacteristics; tc.DataAlignment = data_align_specification('msvc'); this(idx).TargetCharacteristics = tc; this(idx).IsVisible = false; idx = idx+1; this(idx) = RTW.TflRegistry('RTW'); this(idx).Name = 'Intel IPP/SSE for x86/Pentium (Windows)'; this(idx).TableList = {'intel_sse_tfl_table.mat', 'intel_ipp_tfl_table_win_32.mat'}; this(idx).TargetHWDeviceType = {'Intel Pentium', 'AMD->K5/K6/Athlon'}; this(idx).Description = 'Use Intel IPP library and SSE instructions for optimized code generation'; tc = RTW.TargetCharacteristics; tc.DataAlignment = data_align_specification('msvc'); this(idx).TargetCharacteristics = tc; %% linux idx = idx+1; this(idx) = RTW.TflRegistry('RTW'); this(idx).Name = 'Intel IPP for x86-64 (Linux)'; this(idx).TableList = {'intel_ipp_tfl_table_glnxa_64.mat'}; this(idx).TargetHWDeviceType = {'Intel->x86-64', 'AMD->Athlon 64', ... 'Intel->x86-64 (Linux 64)', 'AMD->x86-64 (Linux 64)'}; this(idx).Description = 'Use Intel IPP library for optimized code generation'; this(idx).LanguageConstraint = {'C99 (ISO)', 'C89/C90 (ANSI)'}; idx = idx+1; this(idx) = RTW.TflRegistry('RTW'); this(idx).Name = 'Intel IPP/SSE with GNU99 extensions for x86-64 (Linux)'; this(idx).TableList = {'intel_sse_tfl_table.mat', 'intel_ipp_tfl_table_glnxa_64.mat'}; this(idx).BaseTfl = 'GNU'; this(idx).TargetHWDeviceType = {'Intel->x86-64', 'AMD->Athlon 64', ... 'Intel->x86-64 (Linux 64)', 'AMD->x86-64 (Linux 64)'}; this(idx).Description = 'Use Intel IPP library and SSE instructions for optimized code generation'; tc = RTW.TargetCharacteristics; tc.DataAlignment = data_align_specification('gcc'); this(idx).TargetCharacteristics = tc; otherwise this(1) = RTW.TflRegistry; this(1).Name = 'Intel IPP'; this(1).TableList = {}; this(1).TargetHWDeviceType = {'Intel Pentium', 'AMD->K5/K6/Athlon', 'Intel->x86-64', 'AMD->Athlon 64', ... 'Intel->x86-64 (Windows64)', 'Intel->x86-64 (Linux 64)', 'Intel->x86-64 (Mac OS X)', ... 'AMD->x86-64 (Windows64)', 'AMD->x86-64 (Linux 64)', 'AMD->x86-64 (Mac OS X)'}; this(1).Description = 'Use Intel IPP library for optimized code generation'; this(1).LanguageConstraint = {'C99 (ISO)', 'C89/C90 (ANSI)'}; this(2) = RTW.TflRegistry; this(2).Name = 'Intel IPP/SSE with GNU99 extensions'; this(2).Alias = {'Intel IPP/SSE (GNU)'}; this(2).TableList = {}; this(2).BaseTfl = 'GNU'; this(2).TargetHWDeviceType = {'Intel Pentium', 'AMD->K5/K6/Athlon', 'Intel->x86-64', 'AMD->Athlon 64', ... 'Intel->x86-64 (Windows64)', 'Intel->x86-64 (Linux 64)', 'Intel->x86-64 (Mac OS X)', ... 'AMD->x86-64 (Windows64)', 'AMD->x86-64 (Linux 64)', 'AMD->x86-64 (Mac OS X)'}; this(2).Description = 'Use Intel IPP library for optimized code generation'; end end % ------------------------------------------------------------------------- function da = data_align_specification(compiler) switch lower(compiler) case 'msvc' aT = '__declspec(align(%n))'; case {'gcc', 'g++', 'clang', 'mingw'} aT = '__attribute((aligned(%n)))'; otherwise error('Unhandled: %s',compiler); end as = RTW.AlignmentSpecification; as.AlignmentType = { 'DATA_ALIGNMENT_LOCAL_VAR', ... 'DATA_ALIGNMENT_STRUCT_FIELD', ... 'DATA_ALIGNMENT_GLOBAL_VAR'}; as.AlignmentSyntaxTemplate = aT; as.SupportedLanguages={'c', 'c++'}; da = RTW.DataAlignment; da.addAlignmentSpecification(as); end % LocalWords: intel ipp glnx Athlon