gusucode.com > wlan工具箱matlab源码程序 > wlan/wlan/+wlan/+internal/wlanCRCGenerate.m

    function y = wlanCRCGenerate(x,varargin)
%wlanCRCGenerate Generate CRC checksum
%
%   Note: This is an internal undocumented function and its API and/or
%   functionality may change in subsequent releases.
% 
%   Y = wlanCRCGenerate(X) generates CRC checksum for an input message X as
%   per IEEE Std 802.11-2012 Section 20.3.9.4.4.
%   
%   Y is an int8 column vector of length 8 containing the checksum.
%  
%   X is an integer, binary, column vector containing the message bits.
%
%   Y = wlanCRCGenerate(X,NUMBITS) generates CRC checksum with a specified
%   number of bits. When NUMBITS is 4 the CRC is generated as described in
%   IEEE P802.11ah/D5.0 Section 24.3.8.2.1.5. Otherwise the CRC is
%   generated as described in IEEE Std 802.11-2012 Section 20.3.9.4.4.
%
%   % Example 1: Generate the CRC for the HT-SIG field according to IEEE
%   % Std 802.11-2012 Section 20.3.9.4.4.
%
%     m = [1 1 1 1 0 0 0 1 0 0 1 0 0 1 0 0 1 1 0 0 0 0 0 0].';
%     y = wlan.internal.wlanCRCGenerate(m);
%
%   % Example 2: Generate the CRC for the S1G-SIG field according to IEEE
%   % P802.11ah/D5.0 Section 24.3.8.2.1.5.
%
%     m = [1 1 1 1 0 0 0 1 0 0 1 0 0 1 0 0 1 1 0 0 0 0 0 0].';
%     numBits = 4;
%     y = wlan.internal.wlanCRCGenerate(m,numBits);
%
%   See also wlanCRCDetect.

%   Copyright 2015-2016 The MathWorks, Inc.

%#codegen

narginchk(1,2)

if nargin>1
    % Allow number of bits and be specified
    numBits = int8(varargin{1});
    shiftReg = uint8(2^varargin{1}-1);
    finalXOR = uint8(2^varargin{1}-1);
else
    % Section 20.3.9.4.4 in IEEE Std 802.11-2012 
    numBits  = int8(8);
    shiftReg = uint8(255);
    finalXOR = uint8(255);
end

% Generator polynomial selected based on number of CRC bits
if numBits==4
    genPoly = uint8(3);  % Section 24.3.8.2.1.5 IEEE P802.11ah/D5.0 
else
    genPoly  = uint8(7); % Section 20.3.9.4.4 in IEEE Std 802.11-2012 
end

for i = 1:length(x)
    regOut = bitand(bitshift(shiftReg, 1 - numBits), uint8(1));
    regIn  = bitxor(regOut, uint8(x(i)));

    if regIn
        shiftReg = bitshift(bitxor(bitshift(genPoly, -1), shiftReg), 1);
        shiftReg = shiftReg + 1;
    else
        shiftReg = bitshift(shiftReg, 1);
    end
end  

shiftReg = bitxor(shiftReg, finalXOR);         

y = coder.nullcopy(zeros(numBits, 1, 'int8'));
for i = 1:numBits
    y(i) = bitand(bitshift(shiftReg, -(numBits - i)), 1);
end

end